Ferroelectric memory

Random access memory

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Chinese name: Ferroelectric memory
Foreign name: Ferroelectric memory

Developers: Ramtron International
Country: U.S.A
development time: 1993

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brief introduction

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Ferroelectric RAM (FRAM) is a kind of random access memory, which will Dynamic random access memory (DRAM) fast read and write access - it is the most common type of personal computer storage - and the ability to retain data after the power is turned off (just like other stable storage devices, such as read-only memory And flash memory). Since ferroelectric memory is not as dense as dynamic random access memory (DRAM) and static random access memory (SRAM) (that is, it cannot store as much data as they do in the same space), it is likely that it cannot replace these technologies. However, it is expected to be widely used in consumers' small devices, such as Personal digital assistant (PDA), mobile phone, power meter, smart card and security system. Ferroelectric memory (FRAM) is faster than flash memory. In some applications, it is also possible to replace EEPROM and static Random access memory (SRAM) and become a key component of future wireless products^[1] 。

brief history

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Ferroelectric storage technology was proposed as early as 1921, and it was not until 1993 that Ramtron International successfully developed the first 4K bit Ferroelectric memory FRAM All FRAM products are manufactured or authorized by Ramtron. FRAM has new development, adopts 0.35um process, launches 3V products, and develops "single pipe and single capacity" Storage unit The maximum density can reach 256K bits.

Technical characteristics

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The first thing to note is the technical difference between ferroelectric memory and floating gate memory. Existing Flash and EEPROM All adopt floating gate technology, floating gate Storage unit It includes an electrical isolation door, and the floating gate is located below the standard control gate and above the channel layer. The floating gate is made of a conductive material, usually a multi chip silicon layer (as shown in Figure 2). The information storage of the floating gate storage unit is completed by saving the charge in the floating gate. By changing the voltage of the floating gate storage cell, the charge can be added or erased, thus determining whether the storage cell is in the "1" or "0" state. However, the floating gate technology needs to use a charge pump to generate high voltage, forcing the current to pass through the gate oxide layer to achieve the erasure function, so 5-10ms of erasure delay is required. High write power and long-term write operations will destroy the floating gate memory cell, resulting in a limited number of erasures (for example, the flash memory is about 100000 times, while the EEPROM is about 1 million times).

Figure 2

Ferroelectric memory is a nonvolatile memory with a special process. It is made of artificially synthesized lead zirconium titanium (PZT) materials to form memory crystals, as shown in Figure 3. When an electric field is applied to the iron transistor, the central atom stops at the low energy state I along the electric field. On the contrary, when the electric field reversal is applied to the same iron transistor, the central atom moves in the crystal along the direction of the electric field and stops at another low energy state II. A large number of central atoms move and couple in the crystal cell to form ferroelectric domains, which form polarized charges under the action of electric field. The polarization charge formed by ferroelectric domain inversion under electric field is higher, and the polarization charge formed by ferroelectric domain non inversion under electric field is lower Ferroelectric material The binary stable state of^[2] 。

Figure 3

Especially when the electric field is removed, the central atom remains in a low energy state, and the state of the memory is also preserved and will not disappear. Therefore, it can be distinguished by the high polarization charge formed by the inversion of ferroelectric domains under the electric field, or the low polarization charge formed by no inversion Storage unit Is in the "1" or "0" state. The reversal of ferroelectric domains does not require a high electric field, and the storage cell can be changed to be in the "1" or "0" state only with a general working voltage; Charge pump is not required to generate high voltage data erasure, so there is no phenomenon of erasure delay. This feature enables the ferroelectric memory to continue to save data after power failure. It has fast write speed and unlimited write life, and is not easy to write bad. Therefore, compared with earlier nonvolatile memory technologies such as flash memory and EEPROM, ferroelectric memory has higher write speed and longer read/write life.

principle

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FRAM utilization Ferroelectric crystal Data storage is realized by ferroelectric effect. Ferroelectric effect means that when a certain electric field is applied to a ferroelectric crystal, the central atoms of the crystal move under the action of the electric field and reach a stable state; When the electric field is removed from the crystal, the central atom will remain in its original position. This is because the middle layer of the crystal is a high energy level, and the central atom cannot cross the high energy level to reach another stable position without obtaining external energy. Therefore, FRAM does not need voltage to maintain data, nor does it need periodic refreshing like DRAM. Since ferroelectric effect is an inherent polarization polarization characteristic of ferroelectric crystals, it has nothing to do with electromagnetic effect FRAM memory Its contents will not be affected by external conditions such as magnetic field factors. It can be used like ordinary ROM memory and has nonvolatile storage characteristics.

FRAM is characterized by high speed, RAM like operation, extremely low read and write power consumption, and does not have the problem of maximum write times like E2PROM. However Ferroelectric crystal Feature constraints. FRAM still has the maximum number of accesses (reads).

storage structure

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FRAM's Storage unit It is mainly composed of capacitance and FET, but this capacitance is not an ordinary capacitance, and a layer of crystalline is deposited between its two electrode plates Ferroelectric crystal film. Early FRAM uses two FETs and two capacitors for each storage cell, called "two transistors and two capacitors" (2T2C). Each storage cell includes Data bits And respective reference bits. In 2001, Ramtron designed and developed a more advanced "single tube, single capacity" (1T1C) storage cell. All data bits of the FRAM of 1T1C use the same reference bit, instead of using separate reference bits for each data bit. 1T1C's FRAM product has lower cost and larger capacity.

Read write operation

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FRAM saves data not through the charge on the capacitor, but by Storage unit In capacitance Ferroelectric crystal Record the central atomic position of. It is impossible to detect the position of the central atom directly. The actual reading operation process is: apply a known electric field on the storage cell capacitor (that is, charge the capacitor). If the position of the central atom of the original crystal is the same as the direction of the applied electric field, so that the central atom will not move; If on the contrary, the central atom will cross the high energy level of the middle layer of the crystal to another position, and a spike will appear on the charging waveform, that is, the one that produces the atomic movement is one more spike than the one that does not. By comparing this charging waveform with the charging waveform of the reference position (determined and known), it can be judged that the content of the detected storage cell is "1" Or "0".

Whether it is the FRAM of 2T2C or 1T1C, yes Storage unit When reading, Data bits The state may change but the reference bit will not (because the direction of the electric field applied by the read operation is the same as the position of the atom in the original reference bit). Since the read operation may change the state of the storage unit, the circuit needs to automatically recover its contents, so each read operation is followed by a "precharge" process to recover the data bits, while the reference bits do not need to be recovered. The switching time of the atomic state of the crystal is less than 1ns, and the time of the read operation is less than 70ns. With the "pre charging" time of 60ns, a complete read operation time is about 130ns.

The write operation is very similar to the read operation, as long as the electric field in the desired direction is applied to change Ferroelectric crystal Instead of restoring. However, the write operation still needs a "pre charge" time, so the total time is the same as the read operation. Compared with other nonvolatile memory writes, FRAM writes much faster and consumes less power.

Read write timing

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There must be a "pre charge" process after the FRAM read operation to recover Data bits 。 increase Pre charge time A complete read operation cycle of the post FRAM is 130ns, which is different from SRAM and E2PROM.

Technical comparison

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Ramtron's FRAM mainly includes two categories: serial FRAM and parallel FRAM. The serial FRAM is divided into I2C two wire FM24 series and SPI three wire FM25 series. Serial FRAM and traditional 24 and 25 E2PROM Pin It is compatible in time sequence and can be replaced directly, such as the same model products of Microchip and Xicor, but the performance is much better. The performance comparison is shown in Table 1. Parallel FRAMs are expensive but fast. Due to the "pre charging" problem, they are different in timing and cannot be directly replaced with traditional SRAM.

FRAM products have the advantages of RAM and ROM, fast read and write speed, and can be used like nonvolatile memory. because Ferroelectric crystal The inherent disadvantage of FRAM is that the number of accesses is limited. If the limit is exceeded, FRAM will no longer be non-volatile. Ramtron gives the maximum access times of 1 million, which is 10 times longer than the flash life. However, it does not mean that FRAM will be scrapped after exceeding this number, but it just has no non-volatile, but it can still be used like ordinary RAM.

1. FRAM and E2PROM

FRAM can be used as the second option of E2PROM. In addition to the performance of E2PROM, it has much faster access speed. But before you decide to use FRAM, you must make sure that there is no danger in the system once you have exceeded 1 million accesses to FRAM.

2. FRAM and SRAM

SRAM is superior to FRAM in terms of speed, price and ease of use, but FRAM has certain advantages in terms of the overall design.

Assume that the design requires about 3K bytes of SRAM, and hundreds of bytes to save the E2PROM configuration of the startup code.

The non-volatile FRAM can save the startup program and configuration information. If the maximum access speed of all the memory in the application is 70ns, you can use a piece of FRAM to complete the system, so that System structure It's simpler.

3. FRAM and DRAM

DRAM is applicable to those occasions where density and price are more important than speed. For example, DRAM is a graph Display memory There are a lot of pixels to be stored, and the recovery time is not very important. If you do not need to save the last content when starting up next time, you can use volatile DRAM memory. The role and cost of DRAM are incomparable to FRAM. Facts have proved that DRAM is not a substitute for FRAM.

4. FRAM and Flash

Most commonly used Program memory Flash, which is very convenient and cheaper. The program memory must be nonvolatile and relatively inexpensive, and easy to rewrite. The use of FRAM will be limited by the number of accesses, and it will lose its nonvolatility after multiple reads^[1] 。

Charging signal

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In most 8051 systems Chip Select It is generally allowed to remain low for multiple read and write access operations. However, this is not applicable to FM1808. A positive jump must be generated by the hardware at each access. One standard 8051 core Machine cycle Including 12 Clock cycle ALE signal is valid twice in each machine cycle, except that it is valid only once when accessing external data memory. 8051 pairs External memory A read or write operation of requires two machine cycles. One machine cycle of fast 8051, such as DS87C520 or W77E58, only needs 4 clock cycles, while in some new 8051, such as PHILIPS, one machine cycle is 6 clock cycles, and the ALE signal is valid twice in any machine cycle. Despite these differences, ALE signals and addresses can still be used Film selection To generate a signal that can be used as FRAM to access CE. To ensure correct access to FM1808, two points must be noted:

First, the access time must be greater than 70 ns (that is, the access time of FRAM);

Second, the high level width of ALE must be greater than 60 ns.

The width of standard 8051/52ALE signals varies slightly from manufacturer to manufacturer. Some fast 8051/52 series, such as DALLAS DS87C520 and WINBOND W77E58, are narrower.

To realize the normal operation of FM1808, the main frequency of standard 8051/52 should not be higher than 20MHz, and the main frequency of high-speed 8051/52 should not be higher than 23MHz.

interface circuit

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The interface circuit between FM1808 and 8051 uses the ALE signal of 8051 and the Chip Select Phase "or" to generate the positive jump of CE. Two pieces of 32K 8 FRAM memory, A15 and ALE are used as U2's Film selection , after being reversed, it will be used as the selection of U3 fragments. Therefore, the address of U2 is 0~7FFFH, and the address of U3 is 8000H~FFFFH. The RD signal of 8051 is allowed as the output of U3 after being "matched" with the PSEN signal, so U3 is used as a program or data memory. When the J1 jumper block is on the right, U2 and U3 are used in the same way, while when the J1 jumper block is on the left, U2 is only used as Program memory 。 To ensure that the code will not be accidentally overwritten, just disconnect J2. The interface circuit between FM1808 and 8051/52 (omitted) should be noted because Logic gate circuit They all have a delay time of 6~8ns. When the main frequency is high, fast logic chips (F series) should be used.

Conclusion

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In a word, FRAM products provide a new choice of usable memory, which will perform better in the applications that used E2PROM, and find a new way for some application systems that originally thought they needed to use SRAM and E2PROM. Ferroelectric has solved the limit of maximum access times and can become all embedded and universal memory^[3] 。

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