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Dynamic random access memory

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Dynamic random access memory
Dynamic random access memory (DRAM) uses the random access memory of dynamic storage unit, referred to as DRAM or dynamic RAM.
Chinese name
Dynamic random access memory
Foreign name
dynamic random access memory
Dynamic Random Access Memory (DRAM) is the most common system memory. DRAM can only keep data for a short time. In order to maintain data, DRAM uses capacitance storage, so it must refresh every other time. If the storage unit is not refreshed, the stored information will be lost. Shutdown will cause data loss.

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Random access memory used by general computer systems( RAM )DRAM and SRAM( SRAM )The difference between the two is that DRAM needs to be controlled by storage The control circuit refreshes the memory according to a certain period to maintain data storage. SRAM data does not need a refresh process, and data will not be lost during power on. [1]

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The difference between the overall structure and working principle of dynamic RAM and static RAM (see RAM) is that the storage matrix uses dynamic memory cells. Static flip-flop stores data by feedback self-locking of circuit state, while dynamic memory cell stores data by storing charge on capacitor.
Figure 1
There are various types of circuit structures of dynamic memory cell, the simplest one is the single tube dynamic memory cell shown in the figure.
When writing data, the word line gives a high level, the MOS tube VT is on, the voltage signal on the bit line is charged to capacitor C through VT, and the data is stored in C. When reading out, the word line also gives a high level to make VT turn on, and the capacitance C passes through VT to the parasitic capacitance C on the bit line B Charging enables the bit line to obtain the readout signal.
The circuit structure of dynamic memory unit is simple, and the integration degree is much higher than that of static RAM. However, the charge on capacitor C cannot be stored for a long time. It is necessary to supplement the charge to the capacitor in time to avoid data loss. For this reason, a "refresh" control circuit is set in the dynamic RAM to read out the data in the storage matrix periodically, and then write it again after amplification. This not only increases the complexity of the control circuit, but also seriously affects the read/write speed, making the working speed of dynamic RAM far lower than that of static RAM.