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Internal bus

Internal bus
Internal bus is an internal structure, which is a common channel for cpu, memory, input and output devices to transfer information.
Chinese name
Internal bus
Foreign name
Internal Bus
Discipline
electronic technique
Field
Engineering technology

definition

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Internal bus, which will processor All structural units of are internally connected. Its width can be 8, 16, 32, 64, or 128 bits.
If inside the CPU, register The bus used for data transmission between ALU and control unit is called chip Internal bus (i.e. the bus inside the chip) [1]

Internal bus technology

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Several popular internal bus technologies:
1. I2C bus
I2C (Inter IC) bus was introduced by Philips Company in 1982, which is a new type widely used in the field of microelectronic communication control in recent years Bus standard It is Synchronous communication It is a special form of, which has the advantages of fewer interface lines, simplified control mode, small device packaging form, and higher communication rate. In master slave communication, multiple I2C bus devices can be connected to the I2C bus at the same time, and the communication object can be identified by address.
2. SPI bus
Serial peripheral interface SPI(serial peripheral interface) Bus technology It is a product of Motorola Synchronous serial interface Most MCU produced by Motorola( micro controller )All are equipped with SPI hardware interface, such as 68 series MCU. SPI bus is a three wire synchronous bus. Because of its strong hardware function, the software related to SPI is quite simple, allowing the CPU to have more time to deal with other transactions.
3. SCI bus
serial communication The serial communication interface (SCI) is also introduced by Motorola. It is a universal asynchronous communication interface UART, which has basically the same asynchronous communication function as MCS-51 [2]

Internal bus development

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External frequency and FSB bus
fsb and Front end bus They are two different concepts. The reason why people are confused is that in the old Pentium era, the frequency values of the two are often the same.
fsb Refers to external CPU clock frequency ,CPU Dominant frequency =External frequency X frequency doubling In the Pentium era, CPU fsb Generally 60/66MHz, starting from the Pentium II 350, CPU external frequency Increase to 100MHz.
and Front end bus Speed refers to CPU and Beiqiao chip The speed of inter bus indicates the speed of data transmission between CPU and the outside world.
reason why Front end bus It is easy to confuse the two concepts of external frequency. The main reason is that for a long time (mainly before and just after the appearance of Pentium 4), Front end bus frequency It is the same as the external frequency, so the front-end bus is often called the external frequency directly, which eventually leads to such a misunderstanding.
With the development of computer technology, people found that Front end bus frequency Need to be higher than fsb Therefore, DDR (Double Date Rate) technology and QDR (Quad Date Rate) technology are generated, making the frequency of the front-end bus twice that of the external frequency( AMD K7 of processor ), 4x( Intel Pentium processing of Core processor )Since then, the difference between the front-end bus and the external frequency has begun to be valued.
Front end bus The name "FSB" is defined by AMD When the K7 CPU was introduced, the front end bus speed refers to the speed of data transmission, because the maximum bandwidth of data transmission depends on the width and transmission frequency of all data transmitted at the same time, that is, the data bandwidth=(bus frequency X data Bit width )÷8。
What can be achieved on PC Front end bus frequency 266MHz( AMD )、333MHz( AMD & Intel )、400MHz( AMD & Intel )、533MHz( Intel )、800MHz( Intel )、1066MHz( Intel )、1333MHz( Intel )、1600MHz( Intel )And so on, Intel Latest Premium Edition processor The QX9770 adopts a 1600MHz front-end bus, and the maximum bandwidth is 1600 × 64 ÷ 8=12.8G/s.
Front end bus frequency The larger the data transmission volume between the CPU and the North Bridge, the better the function of the CPU. Conversely, the lower Front end bus It is impossible to supply enough data to the CPU, which limits the performance of the CPU and becomes the bottleneck of the system.
HT Bus (Hyper Transport)
from AMD K8 processing starts, AMD and Intel The development of the two internal buses began to diverge, Intel Continue to use the Core 2 CPU of FSB, while AMD Then developed the HT bus (Hyper Transport) countermeasures Intel
HT bus is AMD Specially designed for K8 platform High speed serial bus Its development history can be traced back to 1999, formerly known as "Lightning Data Transport". In July 2001, this technology was officially launched, AMD Also rename it Hyper Transport. Subsequently, Broadcom, Cisco, Sun, NVIDIA, ALi, ATI, Apple, Transmet and many other enterprises decided to adopt this new model Bus technology , and AMD It also takes this opportunity to form a Hyper Transport open alliance, so as to promote Hyper Transport to the industry.
First generation: HT's working frequency In the range of 200MHz - 800MHz, two-way 16 bit mode, the maximum bandwidth It can reach 6.4GB/s.
The second generation: In February 2004, the Hyper Transport Technology Alliance officially released the HT2.0 specification. Due to the adoption of Dual data technology, the frequency has been successfully raised to 1.0GHz, 1.2GHz and 1.4GHz, with two-way 16bit mode Bus bandwidth It has been upgraded to 8.0GB/s, 9.6GB/s and 11.2GB/s.
The third generation: November 19, 2007, AMD The HT3.0 bus specification was officially released, providing 1.8GHz, 2.0GHz, 2.4GHz and 2.6GHz frequencies, which can support up to 32 channels. Under 32-bit channel, two-way bandwidth Up to 41.6GB/s.
QPI bus
because AMD The maximum bandwidth provided by HT3.0 far exceeds Intel 1600 FSB bandwidth. To combat HT 3.0, Intel In another way, the QPI bus is proposed.
As we calculated earlier, the 1600FSB can provide 12.8G/s bandwidth, but such a high bandwidth can only meet the bandwidth requirements of DDR2 800 dual channel memory (800 X 64 X 2/8=12.8G/s). If it is combined with 1066 or even higher 1333 memory, the FSB needs to be increased to a higher frequency, not to mention PCI bus PCI-E bus, USB, SATA and other devices also need to occupy a certain bandwidth. Under the current production process and framework, it becomes even more difficult to increase the frequency. Even if some players increase the FSB to 2400, the heat generated is also terrible.
along with Processor core With the improvement of performance and the rapid growth of the number of cores, FSB is becoming a bottleneck and must be solved. Intel If you want to Multi core The era is in an invincible position. The first problem is to successfully solve the problem of system resource allocation and give full play to the advantages of multi-core. This is Intel's launch of QPI Bus technology The ultimate purpose of.
The biggest improvement of QPI is that it provides amazing output transmission capability, ranging from 4.8 to 6.4 GT/s. A connected Bit width It can be 5, 10 or 20 bits. Therefore, the QPI full width link in each direction can provide a bandwidth of 12 to 16BG/s. Then the bandwidth of each QPI link is 24 to 32GB/s, equivalent to two to three times the 1600FSB bandwidth, which is basically the same as the HT 3.0 bandwidth.
In addition, another highlight of QPI is that it supports multiple system bus connect, Intel It is called multi FSB. system bus It will be divided into multiple connections, and the frequency is no longer single and fixed, and there is no need to connect through FSB as before.
Compared with FSB, QPI bus is of great revolutionary significance, which has brought innovation in PC manufacturing structure and abandoned the previous concept of North Bridge and South Bridge [3]