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Memory encapsulation

Packaging method
Memory encapsulation is to Memory chip Wrap it to avoid the contact between the chip and the outside world and prevent the damage of the outside world to the chip. Impurities and undesirable gases in the air, as well as water vapor, will corrode the precise circuit on the chip, thus causing a decline in electrical performance. Different packaging technologies have great differences in manufacturing processes and processes. Packaging also plays a vital role in the performance of memory chips.
Chinese name
Memory encapsulation
Category
packing
Role
Avoid chip contact with the outside world
Interpretation
take Memory chip Wrap up

development history

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With the rapid development of optoelectronic and microelectronic manufacturing technology, electronic products are always developing in the direction of smaller, lighter and cheaper, so the packaging form of chip components is also constantly improved. There are many kinds of packaging technologies for chips, including DIP, POFP, TSOP, BGA, QFP, CSP, etc. There are no less than 30 kinds of packaging technologies, which have gone through the development process from DIP, TSOP to BGA. The packaging technology of chips has undergone several generations of changes, with increasingly advanced performance. The ratio of chip area to packaging area is getting closer and closer, the application frequency is getting higher and higher, and the temperature resistance is getting better and better Pin The number increases, the pin spacing decreases, the weight decreases, the reliability is improved, and the use is more convenient.

type

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DIP package

Memory encapsulation
In the 1970s, chip packaging was basically DIP (Dual ln Line Package) packaging, which was suitable for PCB at that time( pcb )Perforated installation, easy wiring and operation. DIP package There are many kinds of structural forms of ceramic DIP, including multi-layer ceramic DIP, single-layer ceramic DIP, Lead frame Type DIP, etc. However, the packaging efficiency of DIP packaging is very low, and the ratio of chip area to packaging area is 1:1.86. In this way, the area of packaged products is large, and the area of memory PCB board is fixed. The larger the packaging area is, the fewer chips are installed on the memory, and the smaller the memory module capacity is. At the same time, the larger packaging area Memory frequency The improvement of transmission rate and electrical performance has an impact. In an ideal state, the ratio of chip area to package area is 1:1, which is the best, but it cannot be achieved unless packaging is not carried out. However, with the development of packaging technology, this ratio is getting closer and closer, and there is a memory packaging technology of 1:1.14.

TSOP package

Memory encapsulation
In the 1980s, TSOP, the second generation of memory packaging technology, emerged and was widely recognized by the industry. It is still the mainstream technology of memory packaging. TSOP is the abbreviation of "Thin Small Outline Package", which means thin small size package. TSOP memory is made around the chip Pin SMT technology (surface mounting technology) is used to attach directly to the surface of PCB board. TSOP package In terms of overall dimensions, parasitic parameters (output voltage disturbance caused by large current changes) are reduced, which is suitable for high-frequency applications, easy to operate, and high reliability. At the same time, TSOP packaging has the advantages of high yield and low price, so it has been widely used.
TSOP Packaging method Medium, Memory chip It is welded on the PCB board through the chip pin. The contact area between the solder joint and the PCB board is small, which makes it relatively difficult for the chip to conduct heat transfer to the PCB. and TSOP package When the memory of the mode exceeds 150MHz, large signal interference and electromagnetic interference will be generated. [1]

BGA package

Memory encapsulation
In the 1990s, with the progress of technology Integration With continuous improvement, the number of I/O pins increases sharply, and the power consumption also increases Integrated circuit packaging The requirements of are also more stringent. In order to meet the needs of development, BGA package Start to be applied to production. BGA is the abbreviation of Ball Grid Array Package, namely ball grid array package.
The memory packaged with BGA technology can increase the memory capacity by two to three times with the same volume. Compared with TSOP, BGA has smaller volume, better heat dissipation and electrical performance. BGA packaging technology Make Storage capacity It has been greatly improved. Under the same capacity, the volume of memory products using BGA packaging technology is only one third of that of TSOP packaging; In addition, compared with traditional TSOP Packaging method comparison, BGA package There is a faster and more effective way to dissipate heat.
The I/O terminals of BGA package are distributed under the package in the form of circular or columnar solder joints in an array. The advantage of BGA technology is that although the number of I/O pins has increased, the pin spacing has not decreased, but has increased, thus improving the assembly yield; Although its power consumption increases, BGA can be welded by controllable collapse chip method, which can improve its electrothermal performance; The thickness and weight are reduced compared with the previous packaging technology; Parasitic parameters decrease, signal Transmission delay Small, the use frequency is greatly increased; Coplanar welding is available for assembly, with high reliability. [2]
When it comes to BGA packaging, Kingmax's patented TinyBGA technology, which is called TinyBall Grid Array in English, belongs to BGA packaging technology A branch of Kingmax was successfully developed by Kingmax in August 1998. The ratio of chip area to package area is not less than 1:1.14, which can increase the memory capacity by 2 to 3 times with the same volume. Compared with TSOP package products, it has smaller volume, better heat dissipation performance and electrical performance.
Memory products using TinyBGA packaging technology have a volume of only 1/3 of TSOP packaging under the same capacity. The pins of TSOP package memory are led out from around the chip, while TinyBGA is led out from the center of the chip. This method effectively shortens the transmission distance of the signal. The length of the signal transmission line is only 1/4 of that of the traditional TSOP technology, so the signal attenuation is also reduced. This not only greatly improves the anti-interference and anti noise performance of the chip, but also improves the electrical performance. TinyBGA packaging chip can withstand up to 300MHz external frequency, while traditional TSOP packaging technology can only withstand up to 150MHz external frequency.
TinyBGA packaged memory is also thinner (packaging height is less than 0.8mm) Metal substrate The effective cooling path to the radiator is only 0.36mm. Therefore, TinyBGA memory has higher heat conduction efficiency and is very suitable for long running systems with excellent stability.

CSP encapsulation

Memory encapsulation
CSP (Chip Scale Package) means chip level package. CSP encapsulates the latest generation of Memory chip Packaging technology, its technical performance has been improved. CSP packaging can make the ratio of chip area to packaging area more than 1:1.14, which is quite close to the ideal situation of 1:1. The absolute size is only 32 square millimeters, about 1/3 of the ordinary BGA, and only 1/6 of the TSOP memory chip area. Compared with BGA packaging, CSP packaging can triple the storage capacity in the same space.
CSP encapsulated memory is not only small, but also thinner Metal substrate The most effective cooling path to the heat sink is only 0.2mm, which greatly improves the reliability of the memory chip after a long time of operation. The line impedance is significantly reduced, and the chip speed is also greatly improved. [3]
CSP encapsulation Memory chip The central pin of the chip effectively shortens the transmission distance of the signal, reduces its attenuation, and greatly improves the anti-interference and noise resistance performance of the chip, which also makes the CSP Access time 15% - 20% better than BGA. In CSP Packaging method Medium, Memory granule It is soldered on the PCB board through one solder ball. Because the contact area between the solder joint and the PCB board is large, the heat generated by the memory chip during operation can easily be transferred to the PCB board and distributed. CSP packaging can dissipate heat from the back and has good thermal efficiency. The thermal resistance of CSP is 35 ℃/W, while that of TSOP is 40 ℃/W.

WLCSP

Memory encapsulation
WLCSP (Wafer Level Chip Scale Package), this technology is different from the traditional method of cutting the wafer first, then packaging and testing, but first packaging and testing on the whole wafer, and then cutting. WLCSP has more obvious advantages. First, the process is greatly optimized. The wafer directly enters the packaging process, while the traditional process needs to cut and classify the wafer before packaging. All Integrated circuit It is unimaginable in the traditional process that packaging and printing work are directly carried out on the wafer and equipment testing is completed at one time. Secondly, the production cycle and cost have decreased significantly, and the production cycle of WLCSP has been shortened to 1.5 days. Moreover, the new process brings excellent performance, and the WLCSP packaging technology is used to Pin Reduced, improved Integration Another advantage of WLCSP is Electrical performance The electromagnetic interference generated by the pin is almost eliminated with the increase of. The memory encapsulated by WLCSP can support the frequency of 800MHz, and the maximum capacity can reach 1GB! [4]

Product features

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Memory encapsulation
Different amount of blocky particles are distributed on different memory modules, which is what we call Memory granule At the same time, we also noticed that the shape and volume of memory particles are different for different specifications of memory, which is due to the different "packaging" technologies of memory particles. Generally speaking, DDR memory adopts TSOP (Thin Small Outline Package) packaging technology, which is long and large. DDR2 and DDR3 memory FBGA (bottom spherical pin package) packaging technology is adopted. Compared with TSOP, Memory granule It's much smaller, FBGA package In the form of anti-interference , obvious advantages in heat dissipation, etc.
TSOP refers to the memory particles passing through Pin Soldered on the memory PCB, the pins are led out from the particles to the periphery, so the naked eye can see that there are many metal cylindrical contacts at the interface between the particles and the memory PCB, and Granular packaging The size of DDR memory is large and rectangular. Its advantages are low cost and low process requirements. However, the contact area between solder joints and PCB is small, which makes the conduction effect of DDR memory poor, vulnerable to interference, and the heat dissipation is not ideal. FBGA package Connect DDR2 and DDR3 memory The particles of DDR memory One third of the particles, DDR can not be seen on the memory PCB Memory chip The columnar metal contacts on the top of the package are naturally invisible because their columnar solder joints are distributed under the package in an array form. Its advantage is to effectively shorten the transmission distance of the signal.
Speed and capacity: multiply
Memory encapsulation
When choosing the combination of memory and CPU Memory bandwidth Whether it is greater than or equal to the CPU bandwidth, so as to meet the data transmission requirements of the CPU. from bandwidth Formula (bandwidth= Bit width × Frequency ÷ 8) It can be seen that the frequency is the most closely related to the bandwidth. This is one of the reasons why the equivalent frequency of the third-generation memory rises again and again. The purpose is to meet the CPU bandwidth.
Not only has the speed improved, but with the improvement of our applications, we also need a larger capacity of single memory. 512MB and 1GB of memory are the most popular in the DDR era, while in the DDR2 era, two 1GB of memory are only standard configurations, and the number of computers with 4GB of memory capacity is gradually increasing. Even in the future, a single 8GB memory will appear. This shows that people's requirements for memory capacity are constantly improving.
Delay value: higher generation by generation
Memory encapsulation
Any memory has a CAS delay value, which is like the time that A orders B to do something and B needs to think. In general, the smaller the memory latency, the faster the transmission speed. From the DDR, DDR2, and DDR3 memory, although their transmission speed is getting faster, their frequency is getting higher, and their capacity is getting larger, the delay value has increased. For example, the delay value of DDR memory (the size of the first digit is the most important, and ordinary users can pay attention to the first digit delay value) is 1.5, 2, 2.5, and 3; In the era of DDR2, the delay value has increased to 3, 4, 5, and 6; In the era of DDR3, the delay value continues to increase to 5, 6, 7, 8 or higher.
Power consumption: reduce again and again
Memory encapsulation
If electronic products want to work properly, they must have electricity. When there is power, it needs working voltage, which is from the motherboard through the golden finger Memory socket The obtained memory voltage also reflects the actual power consumption of memory operation. In general, the lower the memory power consumption, the lower the heat generation, and the more stable the operation. DDR memory Its working voltage is 2.5V, and its working power consumption is about 10W; In the era of DDR2, the working voltage dropped from 2.5V to 1.8V; In the era of DDR3 memory, the working voltage is reduced from 1.8V to 1.5V, which can save 30%~40% power consumption compared with DDR2. For this reason, we also see that from DDR memory to DDR3 memory, although Memory bandwidth Significant increase, but the power consumption decreases. At this time, the memory Overfrequency The performance and stability have been further improved.
Manufacturing process: continuous improvement
From DDR to DDR2 and then to DDR3 memory, the manufacturing process is constantly improving, and higher technology level will lead to better electrical performance and lower cost of memory. E.g. DDR Memory granule The 0.13 μ m manufacturing process is widely used, while the 0.09 μ m manufacturing process is used for DDR2 particles, and the new 65nm manufacturing process is used for DDR3 particles (1 μ m=1000 nm).