| model: | SI7120DN-T1-GE3 |
|
| Lead free: | Lead free |
| Rohs certification or not: | accord with |
| Lifecycle: | Obsolete |
| IHS Manufacturer: | VISHAY SILICONIX |
| Packing instructions: | SMALL OUTLINE, S-XDSO-C5 |
| Number of stitches: | eight |
| Reach Compliance Code： | unknown |
| ECCN code: | EAR99 |
| Risk level: | five point seven four |
| Is Samacsys： | N |
| Avalanche energy efficiency grade (Eas): | 24 mJ |
| Enclosure connection: | DRAIN |
| to configure: | SINGLE WITH BUILT-IN DIODE |
| Minimum drain source breakdown voltage: | 60 V |
| Maximum drain current (Abs) (ID): | 6.3 A |
| Maximum drain current (ID): | 6.3 A |
| Maximum drain source on resistance: | 0.019 Ω |
| FET technology: | METAL-OXIDE SEMICONDUCTOR |
| JESD-30 code: | S-XDSO-C5 |
| JESD-609 code: | e3 |
| Humidity sensitivity level: | one |
| Number of elements: | one |
| Number of terminals: | five |
| Operating mode: | ENHANCEMENT MODE |
| Maximum operating temperature: | 150 °C |
| Packaging body material: | UNSPECIFIED |
| Package shape: | SQUARE |
| Packaging form: | SMALL OUTLINE |
| Peak reflux temperature (° C): | two hundred and sixty |
| Polarity/Channel Type: | N-CHANNEL |
| Maximum power dissipation (Abs): | 3.8 W |
| Maximum pulse drain current (IDM): | 40 A |
| Certification status: | Not Qualified |
| Subcategory: | FET General Purpose Powers |
| Surface mounting: | YES |
| Terminal surface layer: | PURE MATTE TIN |
| Terminal type: | C BEND |
| Terminal location: | DUAL |
| Maximum time at peak reflux temperature: | thirty |
| Transistor applications: | SWITCHING |
| Transistor element material: | SILICON |
| Base Number Matches： | one |
|
