FGL40N120ANDTU brand new original schematic diagram Functional circuit principle of each pin Chip pin definition - China IC network - Core 37
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  • Shenzhen Xinfulin Electronics Co., Ltd

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FGL40N120ANDTU product parameters
model: FGL40N120ANDTU
Brand Name: Fairchild Semiconductor
Lead free: Lead free
Rohs certification or not: accord with
Lifecycle: Transferred
IHS Manufacturer: FAIRCHILD SEMICONDUCTOR CORP
Part package code: TO-264
Packing instructions: FLANGE MOUNT, R-PSFM-T3
Number of stitches: three
Manufacturer's package code: 3LD; TO264; MOLDED; JEDEC VARIATION AA
Reach Compliance Code: compliant
ECCN code: EAR99
HTS Code: 8541.29.00.95
Risk level: four point four three
Samacsys Confidence: three
Samacsys Status: Released
2D Presentation: https://componentsearchengine.com/2D/0T/968540.2.1.png
Schematic Symbol: https://componentsearchengine.com/symbol.php?partID=968540
PCB Footprint: https://componentsearchengine.com/footprint.php?partID=968540
3D View: https://componentsearchengine.com/viewer/3D.php?partID=968540
Samacsys PartID: nine hundred and sixty-eight thousand five hundred and forty
Samacsys Image: https://componentsearchengine.com/Images/9/FGL40N120ANDTU.jpg
Samacsys Thumbnail Image: https://componentsearchengine.com/Thumbnails/2/FGL40N120ANDTU.jpg
Samacsys Pin Count: three
Samacsys Part Category: Transistor IGBT
Samacsys Package Category: Transistor Outline, Vertical
Samacsys Footprint Name: FGL40N120ANDTU_
Samacsys Released Date: 2019-02-07 10:43:54
Is Samacsys: N
Maximum collector current (IC): 64 A
Maximum collector emitter voltage: 1200 V
to configure: SINGLE WITH BUILT-IN DIODE
Maximum landing time (tf): 80 ns
Maximum threshold voltage of gate emitter: 7.5 V
Gate emitter maximum voltage: 25 V
JEDEC-95 code: TO-264AA
JESD-30 code: R-PSFM-T3
JESD-609 code: e3
Number of elements: one
Number of terminals: three
Maximum operating temperature: 150 °C
Packaging body material: PLASTIC/EPOXY
Package shape: RECTANGULAR
Packaging form: FLANGE MOUNT
Peak reflux temperature (° C): NOT SPECIFIED
Polarity/Channel Type: N-CHANNEL
Maximum power dissipation (Abs): 500 W
Certification status: Not Qualified
Subcategory: Insulated Gate BIP Transistors
Surface mounting: NO
Terminal surface layer: Matte Tin (Sn)
Terminal type: THROUGH-HOLE
Terminal location: SINGLE
Maximum time at peak reflux temperature: NOT SPECIFIED
Transistor applications: POWER CONTROL
Transistor element material: SILICON
Nominal disconnection time (toff): 165 ns
Nominal switching on time (ton): 45 ns
Base Number Matches: one
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