FGH50N3-NL Schematic Diagram Functional Circuit Principle Chip Pin Definition Pin Diagram and Functions - China IC Network - Core 37
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  • Shenzhen Xinfulin Electronics Co., Ltd

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  • FGH50N3-NL
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  •  FGH50N3-NL diagram
  • Shenzhen Huameirui Technology Co., Ltd

      This member has used this website for more than 15 years
  • FGH50N3-NL
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  • manufactor FAIRCHILD 
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FGH50N6S2 product parameters
model: FGH50N6S2
Rohs certification or not: accord with
Lifecycle: Obsolete
IHS Manufacturer: FAIRCHILD SEMICONDUCTOR CORP
Part package code: TO-247
Packing instructions: FLANGE MOUNT, R-PSFM-T3
Number of stitches: three
Reach Compliance Code: compliant
ECCN code: EAR99
Risk level: eight point four six
Is Samacsys: N
Other features: LOW CONDUCTION LOSS
Maximum collector current (IC): 75 A
Maximum collector emitter voltage: 600 V
to configure: SINGLE
Maximum landing time (tf): 100 ns
Maximum threshold voltage of gate emitter: 5 V
Gate emitter maximum voltage: 20 V
JEDEC-95 code: TO-247
JESD-30 code: R-PSFM-T3
JESD-609 code: e3
Number of elements: one
Number of terminals: three
Maximum operating temperature: 150 °C
Packaging body material: PLASTIC/EPOXY
Package shape: RECTANGULAR
Packaging form: FLANGE MOUNT
Peak reflux temperature (° C): NOT APPLICABLE
Polarity/Channel Type: N-CHANNEL
Maximum power dissipation (Abs): 463 W
Certification status: Not Qualified
Subcategory: Insulated Gate BIP Transistors
Surface mounting: NO
Terminal surface layer: Matte Tin (Sn)
Terminal type: THROUGH-HOLE
Terminal location: SINGLE
Maximum time at peak reflux temperature: NOT APPLICABLE
Transistor applications: POWER CONTROL
Transistor element material: SILICON
Nominal disconnection time (toff): 180 ns
Nominal switching on time (ton): 28 ns
Base Number Matches: one
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