The engineer said that | RH850C1M-Ax MCU solved the complex control problem in the integrated dual traction inverter
-
Key rising edge procedure -
SCANKEY:MOVARP1XORARR13XORRAR13MOVRAR11JBCLRR11,4RETURNJBCLRR13,4GOTONOKEYJBSETR12,0RETURNBCLR12,0RETU -
thirteen billion eight hundred and fifteen million three hundred and forty-six thousand one hundred and one singlechip
-
A survey of the development of automatic control theory -
This paper summarizes the development of automatic control theory, and points out that the automatic control theory has experienced three stages of development, namely, classical control theory, modern control theory and intelligent control theory. Finally, it is pointed out that the combination of various control theories can learn from each other and is the development direction of control theory. It is really difficult to find your information in the overview of the development of automatic control theory! Really, your information is very valuable! Re: Review results of development of automatic control theory You don't know how to open your data! Trouble! Re: A review of the development of automatic control theory can not be opened. Re: A review of the development of automatic control theory. Thank you for sending such a good report. Re: A review of the development of automatic control theory. Thank you! Re: Overview of the development of automatic control theory Thank you -
frozenviolet Industrial control electronics
-
Instructions on data transfer between arm and coprocessor registers -
Today, I encountered the mcr and mrc instructions in reading the bootloader, but I didn't touch them. I checked the document to understand. Both mcr and mrc instructions realize the function of data transmission between arm registers and coprocessor registers, but in different directions. Mcr function: send the data in the ARM processor register to the coprocessor register. Mcr instruction format: mcr coprocessor code, coprocessor opcode 1, destination register (ARM), source register 1 (coprocessor), source register 2 (coprocessor), coprocessor opcode 2 Example: mcrp15,0, r1 -
Quack ARM technology
-
Please look at this strange MICRO BIT board -
Recently, I received several strange microbit boards. I can't download programs compatible with the official platform, let alone use the official firmware. The hardware is also different from the official products. Can you modify the firmware to make it compatible with the official program? The contents of DETAILS are as follows: # DAPLinkFirmware- seehttps://mbed.com/daplinkUniqueID:00000000066dff525754875187045645a5a5a5a597969908HICID:97969908AutoReset:0Automation -
shuma516 MicroPython Open Source
-
Little friend, have you heard anything? -
Little friend, have you heard anything? Don't you get the title at the first time? Have you got it? Little friend, have you heard anything? Yes, it's No. 1, and the questions are in the competition area.. Why is there less discussion now? Reply: Do you have any news, little friend? Maybe the little guy hasn't got the question yet!!! hey!!! Reply: Little friend, have you heard anything? It is estimated that the person who asked that question will not say anything. Reply: Do you have any news, little friend? It seems that they have disappeared now... No one came to send messages.. Anyway, we in Zhejiang said that the topic was published on the Internet that day, but we didn't get a reply from the school: Do you have any news, little guy? Little brother? When you see the reply, please reply: Little Man Peng -
I'm 33 singlechip
-
Read the first stop of clocking in: concurrency and synchronization - Run Linux Kernel 2: Debugging and Case Analysis -
Hello, reading partners. The book will be distributed to everyone this week, and the first stop of clocking questions given by the author Uncle Ben will be released first. It is expected that after reading the first chapter of Run Linux Kernel 2: Debugging and Case Study, you can answer the question. I hope you can open the book and start to discuss and grow together; One by one, walk to the terminal together. Question 1: How to achieve exclusive access to memory in ARM64 processor? 2. What do atomic_cmpxchg() and atomic_xchg() mean respectively? 3. In ARM64, CAS instructions include load acquire and store release instructions. What are their functions? Event handover -
EEWORLD Community Embedded system