FSMC of 100PIN is connected to T6963 LCD controller

flybaby

FSMC of 100PIN is connected to T6963 LCD controller [Copy Link]

STM32F103VET is connected to 5V 240 * 128 LCD T6963 controller. Now there is display on the screen, but there are garbled codes. FSMC is configured as 8-bit data width SRAM mode, and data address is not multiplexed. NE1 is chip selection, and A16 of FSMC is command (status) data selection port line. So I write the command (read status) address: * ((__IO uint8_t *) ((uint32_t) 0x60020001))//command A16=1 (C/D=1). Read/write data address: * (__IO uint8_t *) ((uint32_t) 0x60000001)//Data A16=0 (C/D=0).

The procedure is as follows. Please give us some advice.

// PD.4     →  NOE(RD)
// PD.5     →  NWE(WE)
// PD.7     →  NE1(CS)
// PD.11   →  A16(C/D)
// PD.14   →  D0
// PD.15   →  D1
// PD.0     →  D2
// PD.1     →  D3
// PE.7      → D4
// PE.8     →  D5
// PE.9     →  D6
// PE.10   →  D7

void SMC_LCD_Init(void)
{
GPIO_InitTypeDef GPIO_InitStructure;

FSMC_NORSRAMTimingInitTypeDef FSMC_NORSRAMTimingInitStructure;
FSMC_NORSRAMInitTypeDef FSMC_NORSRAMInitStructure;

RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB | RCC_APB2Periph_GPIOD | RCC_APB2Periph_GPIOE | RCC_APB2Periph_GPIOF | RCC_APB2Periph_GPIOG, ENABLE);

GPIO_InitStructure.GPIO_Speed   = GPIO_Speed_50MHz;
GPIO_InitStructure.GPIO_Mode    = GPIO_Mode_AF_OD; // Set to leak open
GPIO_InitStructure.GPIO_Pin     = GPIO_Pin_0            // PD.0     →  D2
                                  | GPIO_Pin_1            // PD.1     →  D3
                                  | GPIO_Pin_4            // PD.4     →  NOE(RD)
                                  | GPIO_Pin_5            // PD.5     →  NWE(WE)
                                  | GPIO_Pin_7           // PD.7     →  NE1(CS)
                                  | GPIO_Pin_11           // PD.11    →  A16(C/D)
                                  | GPIO_Pin_14           // PD.14    →  D0
                                  | GPIO_Pin_15;           // PD.15    →  D1
GPIO_Init(GPIOD, &GPIO_InitStructure);

GPIO_InitStructure.GPIO_Pin     = GPIO_Pin_1            // PE.1     → RST
                                  | GPIO_Pin_7            // PE.7     →  D4
                                  | GPIO_Pin_8            // PE.8     →  D5
                                  | GPIO_Pin_9            // PE.9     →  D6
                                  | GPIO_Pin_10;           // PE.10    →  D7
GPIO_Init(GPIOE, &GPIO_InitStructure);

RCC_AHBPeriphClockCmd(RCC_AHBPeriph_FSMC, ENABLE);
FSMC_NORSRAMInitStructure. FSMC_Bank=FSMC_Bank1_NORSRAM1;//Select NE1
FSMC_NORSRAMInitStructure. FSMC_DataAddressMux=FSMC_DataAddressMux_Disable;//Address data is not reusable
FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM;//SRAM
FSMC_NORSRAMInitStructure. FSMC_MemoryDataWidth=FSMC_MemoryDataWidth_8b;//The data width is 8 bits
FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable;
FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low;
FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable;
FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState;
FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable;
FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable;
FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable;
FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable;
FSMC_NORSRAMTimingInitStructure.FSMC_AddressSetupTime       = 2;        // ADDSET
FSMC_NORSRAMTimingInitStructure.FSMC_AddressHoldTime        = 2;        // ADDHOLD
FSMC_NORSRAMTimingInitStructure.FSMC_DataSetupTime          = 7;       // DATAST
FSMC_NORSRAMTimingInitStructure.FSMC_BusTurnAroundDuration  = 1;       // BUSTURN
FSMC_NORSRAMTimingInitStructure.FSMC_CLKDivision            = 1;       // CLKDIV
FSMC_NORSRAMTimingInitStructure.FSMC_DataLatency            = 2;       // DATLAT
FSMC_NORSRAMTimingInitStructure.FSMC_AccessMode = FSMC_AccessMode_A;     // ACCMOD
FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &FSMC_NORSRAMTimingInitStructure;
FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &FSMC_NORSRAMTimingInitStructure;

FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure);   
FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM1, ENABLE);
}

#Define Lcd_Cmd_Reg * ((__IO uint8_t *) ((uint32_t) 0x60020001))//Command status C/D (A16)=1
#Define Lcd_Data_Reg * ((__IO uint8_t *) ((uint32_t) 0x60000001))//Data C/D (A16)=0

//Write the instruction code without parameters
__inline void lcdwc(uint8_t cmdcode)
{
while((Lcd_Cmd_Reg&0x3)!= 0x3); //When the lower two bits of Lcd_Cmd_Reg are different, they are 1
Lcd_Cmd_Reg=cmdcode;//Write command word
}
//Write dual parameter instruction code
__inline void lcdwc3(uint8_t cmdcode, uint8_t cmddata,uint8_t cmddata2)
{
while((Lcd_Cmd_Reg&0x3)!= 0x3);
Lcd_Data_Reg=cmddata;
while((Lcd_Cmd_Reg&0x3)!= 0x3);
Lcd_Data_Reg=cmddata2;
while((Lcd_Cmd_Reg&0x3)!= 0x3);
Lcd_Cmd_Reg=cmdcode;
}
//Write data
__inline void lcdwd(uint8_t dispdata)
{
while((Lcd_Cmd_Reg&0x3)!= 0x3);
Lcd_Data_Reg=dispdata;
while((Lcd_Cmd_Reg&0x3)!= 0x3);
Lcd_Cmd_Reg = LC_UNCHANGED_WR;
}
//Read Data
__inline uint8_t lcdrdata(void)
{
uint8_t tmp;
while((Lcd_Cmd_Reg&0x3)!= 0x3);
Lcd_Cmd_Reg = LC_UNCHANGED_RD;
while((Lcd_Cmd_Reg&0x3)!= 0x3);
tmp = Lcd_Data_Reg;
return tmp;
}

coveyniu

No one answered!!! Stand up for yourself!

zxinqiao

I can't see any problems. I always hope that the program notes posted will be more careful, so that everyone will look good

springsky1984

On the top floor, I really don't want to read many programs because they are in disorder

Zhang Haoxiang

                                 mark

woolsack

Random code means that the communication fails and the data is not written in. You can simulate to see if there is a return command

gjchao

FSMC mode is not good. UC/GUI can be run with IO mode! But the screen is slow.

twentyone

When running the FSMC, pay attention to other interruptions, or the FSMC is not used around or is interrupted for too long, otherwise everything will run or be garbled

fengboning

It's better to use a special driver chip

herosw

I am a novice and have just started to do fsmc driven TFT. I have a question to ask you: Why does A16 set 1, so that the 17th place is 1? This question may be relatively elementary, please don't laugh! thank you

dzwwk

I am a novice and have just started to do fsmc driven TFT. I have a question to ask you: Why does A16 set 1, so that the 17th place is 1? This question may be relatively elementary, please don't laugh! Thank you 1 # lu_weixi

Your question is the same as this post: https://bbs.eeworld.com.cn/viewthread.php?tid=160004