The 32-bit architecture of x86 is also calledIA-32, full name“IntelArchitecture,thirty-two-bit”。Its 64 bit architecture was first introduced by AMD and is called "AMD64".Later, it was also adopted by Intel and called "Intel 64".It is also commonly referred to as "x86-64" and "x64".
It is worth noting that Intel has also launchedIA-64Architecture. Although the name is similar to "IA-32", they are completely incompatible and do not belong to the x86 instruction set architecture family.
X86 architecture launched in 1978Intel 8086a central processorFirst appeared in theIntel 8008Processor, and 8008 is developed fromIntel 4004Of.8086 will beIBM PCAfter that, x86 has become the standard platform for personal computers and the most successful CPU architecture ever.
Other companies also manufacture x86 architectureprocessor, countedCyrix(NowVIAAcquired)NECGroup, IBMIDTas well asTransmeta。The most successful manufacturers outside Intel areAMD, its earlier productsAthlonThe market share of series processors is second only to IntelPentium。
8086 is a 16 bit processor;Until the development of the 32-bit 80386 in 1985, the architecture remained 16 bits.Then a series of processors showed the slight improvement of 32-bit architecture, and several extensions were introduced until 2003AMDFor this architecture, a 64 bit extension is developed and namedAMD64。laterIntelIt also introduced a compatible processor, namedIntel 64。The two are generally referred to asx86-64orx64, ushering in the 64 bit era of x86.
It is worth noting that Intel has been cooperating withHPThe cooperation proposed a method foritanium seriesprocessorThe independent 64 bit architecture in theIA-64。IA-64 is a brand new system, which has no similarity with x86 architecture;It should not be compared withx86-64orx64Confused.
Schema Mode
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X86 architecture is significantly variableInstruction lengthOfCISC(ComplexInstruction set computer，ComplexInstructionSetComputer）。Word (4 bytes)storageAccess allows misalignmentMemory addressThe word group is stored in the memory in the order of low order byte first.Forward compatibility has always been a driving force behind the development of x86 architecture (the need for design determines this factor and often leads to criticism, especially from competitorsprocessorThe supporters and theorists of, they are puzzled about the continued success of an architecture that is widely regarded as backward design).However, in the newer microarchitecture, x86 processors will convert x86 instructions into more RISC like onesMicroinstructionAnd then implement it, so as to obtain the comparableSuperscalarPerformance while still maintainingForward compatible。The x86 architecture processor has four execution modes:Realistic mode, protection mode,System management modeas well asVirtual V86 mode。
The names of instructions and register mnemonics that appear in this short article are specified in Intel files and used in Intel assemblers (and compatible ones, such as Microsoft'sMASM、BorlandTASMCAD-ULAs386, etc.).An instruction "mov al, 30h" specified in Intel syntax is equivalent to "movb x30,% al" in AT&T syntax, and both are machine codes "B0 30" that can be translated into two bits（hexadecimal）。You can find that the "mov" or "al" in this program are the original Intel mnemonic symbols.If we want, we can write a assembler by code 'move immediate byte hexadecimally encoded 30 into low half of the first register'(Move the immediate value bitHexadecimal encoding30 to the lower half of the first register) to generate the same machine code.However, traditionallyAssembler(Assembler) has always used Intel's mnemonic symbols.
x86assembly languageWill beX86 assembly languageMore detailed discussion in the article.
Real time mode
Intel 8086 and 8088 have 14 16 bitsregister。Four of them (AX, BX, CX, DX) are general purpose (although each register has an additional purpose; for example, only CX can be used asloopCommandCounter。）Each register can be treated as two separatebyteAccess (so the high bit of BX can be regarded as BH, and the low bit can be regarded as BL).In addition to these registers, there are four section registers (CS, DS, SS, ES). They are used to generatestorageOfAbsolute address。There are two morePointerRegister (SP is pointing tostackBP can be used to point to the stack or other places of memory).Two pointer registers (SI and DI) can be used to point toarrayInside of.Finally, there areFlag register(containsStatus flagFor example, carryoverflow, zero mark, etc.).And IP is used to point toOperation instructionAddress of.
In real mode, memory access is segmented.In order to get the last 20Memory address, move the address of the section 4 bits to the left, and add the offset address.Therefore, in real mode, a total ofaddressingIts space is 2 bytes, or 1MB, which was an impressive symbol in 1979.In real mode, there are two addressing modes: near and far.In far mode, sections and offsets need to be specified;In the near mode, only the offset mode needs to be specified, and the memory section is obtained by the appropriate section register.In terms of data, DS register is used, code is CS register, and stack is SS register.For example, if DS is A000h and SI is 5677h, DS: SI will point to the memory bodyAbsolute addressDS × 16 + SI = A5677h
In this architecture, two pairs of different segments/offsets can point to the same absolute address.Therefore, if DS is A111h and SI is 4567h, DS: SI will point to the same A5677h as the previous segment.In addition to duplication, this architecture cannot have more than 4 sections at a time.In addition, CS, DS and SS are necessary for the correct function of the program, so only ES can be used to point to other places.This mode was originally intended toIntel 8085Compatibility leads to endless pain for programmers.
In addition to the above, the 8086 also has an 8-bit 64K input/output (another way of saying is a 16 bit 32K input/output)（en:I/O）Space, and a 64K (one segment) supported by hardwarestoragestack。Only words (2 bytes) can be pushed onto the stack.The stack grows from the top to the bottom of the memory, and its bottom is pointed by SS: SP.256 interrupts（interrupts）, which can be composed of hardware or software at the same time.Interrupts can be concatenated together, and the stack is used to store the returned interrupted program address.
16 bit protection
Intel 80286 can support 8086'sReal mode16 bit software, however, it also supports an additional operating mode called protection mode, which canaddressingOfphysical memoryIt is expanded to 16MB, and the maximum addressable virtual memory is 1GB.This is usingNodal regionRegister to store index values in the section table.processorThere are two such tables in, respectivelyGDTandLDTEach node can store up to 8192 descriptors, and each node can give up to 64KB descriptorsstoragevisit.The section table provides a 24 bitBase Address(base address), you can use this base address to add the desiredOffsetTo create aAbsolute address。In addition, each section can be given one of the four permission levels (called "rings").
Although the features introduced are an improvement, they are not widely used because the protected mode operating system cannot run the existing real mode software.This ability is only available in the following 80386processorOfVirtual 86 modeAppears in.
At the same time, operating systems such asOS/2Try a ping pong like method to switch the processor between protection and real mode.This will make the computer slow and unsafe. For example, programs in real mode can easily crash the computer.OS/2 also defines restrictive programming rules that allow "Family API" or "bound" programs to run in real mode or protected mode.However, this is related to programs designed for protected mode, otherwise it is not.The protected mode program does not support node selectors andphysical memoryRelationship between.Sometimes I mistakenly believe that programs running in real mode in 16 bit protected mode must use the interrupt call reserved for BIOS by Intel.In fact, the use of arbitrary selector values in such programs is related to the way in which the "node operation" mentioned above is used.
The problem is alsoWindows 3.xAppears on the.This release version wants to run the program in 16 bit protected mode, while the previous version can only run in real mode.In theory, if the Windows 1. x or 2. x program is written "properly" and avoidedNodal regionOperation mode, it is possible to run in both real and protected modes.Windows ProgramsGenerally speaking, node operation is avoided because Windows implements the virtual memory mode of software, and when the program is not running, it is movedstorageThe code and data in theAbsolute addressThe way is very dangerous;When the program is not running, it is considered to keep the "handles" of the memory block. Such handles are already very equivalent to the selectors of the protection mode.Running an old program in Windows 3.0 in protected mode will trigger a warning dialog box. It is recommended to run Windows in real mode (presumably, extended memory can still be used, possibly on the 80386 machineEMM386Simulation, so it is not limited to 640KB) or updated to the new version from the manufacturer.Good behavior programs may use special tools to avoid such dialog boxes.It is impossible for some GUI programs to run in the 16 bit protection mode and other GUI programs to run in the real mode. This may be because it requires two separate environments and depends on the aforementionedprocessorPing pong effect between the two modes.fromWindows 3.1The real mode disappears when the version starts.
32-bit protection
After Intel 80386 was launched, it may be the biggest leap forward of x86 architecture.In addition to the need for attentionIntel 80386SXIt is a 32-bit architecture, but only24 bitaddressing(and16 bitdata bus）。Other architectures are 32-bit - allregister、Instruction set, output input space, andstorageAddressing.In order to work in the functions mentioned by the latter, 32-bit extended protection mode should be used.However, unlike 286386, all segments can use a 32-bit offset. Even though the memory space has used segments, applications are allowed to access more than 4GB of space without segment separation.In addition, 32-bit protection mode providespagingThe support ofvirtual memoryThe mechanism that can be realized.
No newGeneral registerWas added.All 16 bit registers are expanded to32-bit。Intel adds "E" to the mnemonic symbol of the register (so the extended AX becomes EAX, SI becomes ESI, and so on).Because there are more registers, instructions, and arithmetic unitsMachine codeThe format of is also expanded.In order to provide compatibility with the previous architecture, sections containing runcodes can be marked as 16 - or 32-bit instruction sets.In addition, special prepositions can also be used in16 bitThe section of contains 32-bit scripts and vice versa.
Memory access for pages and segments is to supportMulti task operating systemRequired.Linux、386BSD、Windows NTandWindows 95It was developed by 386 Institute at the beginning, because it is the first one to provide reliable program separationstorageSpace support (each program has its ownAddressing space）And can interrupt the running of their programs if necessary (using ring, the name of power hierarchy in x86 protection mode).This 386 basic architecture will become the basis for all x86 series development in the future.
Intel 80386Mathematical auxiliary operationprocessorIt is also being integrated into thisCPULater in the x86 series, Intel 80486.newFPUCan helpFloating point operation, which is very important for scientific calculation and graphic design.
System management mode
Intel first introduced x86 after 80386SLArchitecture。
MMX and after
Intel'sMMX(AMD believes that this is the abbreviation of Matrix Math Extensions, but most of the time it is regarded as Multi Media Extension, and Intel has never officially announced the etymology).Although this new technology has been widely publicized, its essence is very simple: MMX defines eight 64 bitSIMDRegisters, and Intel PentiumprocessorOfFPUStack overlaps.Unfortunately, these instructions cannot be easily mapped to the original CcompilerThe generated script.MMX is also limited to integer operations.The shortcomings of this technology led to the slight impact of MMX in its early existence.Nowadays, MMX is usually used in some 2D movie applications.
3DNow!
AMD launched in 19973DNow!For the SIMD of MMXfloating-pointInstruction enhancement (for the same MMX register).Although these have not been resolvedcompilerHowever, the introduction of this technology is in line with the rise of 3D leisure and entertainment applications on PCs.3D game developers and 3D graphics hardware manufacturersAMDOfAMD K6andAthlonseriesprocessorOn, use 3DNow!To help increase their effectiveness.Microsoft later developedDirect X7.0 for 3DNow!The optimization of, making the Athlon processor at that time comprehensively surpass the opponent in 3D game performance for the first timeIntelOfPentium 3Processor.
SSE
Introduced by Intel in 1999SSEInstruction set, adding eight new 128 bitsregister(Do not overlap with other registers).These instructions are similar to AMD's 3DNow!,It is mainly to add SIMD instructions for floating point operation.
It completely supplements the integer instruction (similar to MMX) to the original SSE register.64 bit SIMDFloating point operationInstruction to the original SSE register.The first increase makes MMX almost obsolete and can be discarded. The second allows these instructions to make traditionalcompilerProduced realistically.
SSE3
In 2004, withPentium 4processorRevision ofPrescottThe kernel is launched.SSE3Add specificstorageAnd thread hanging instructions to improve IntelHyper ThreadingIts efficiency has also been enhanced in scientific computing.
SSE4
In January 2007, Intel publicly announced the use of its 45nm process "Penryn" chip family of PCs and servers."Penryn" is a series ofCore microarchitectureNotebook, desktop andServer chipThere were 16 family codes when they were officially released for the first timeprocessor, except one Intel Core 2 ExtremeQX9650It is aimed at other dual core Xeon 5200 series andQuad coreThe 5400 series are server processors.BasicallyPenrynIs followingMeromThe later reduced version of Core 2 Duo, plus 47 new onesSSE4 instruction setEqual extra equipment.The SSE4 instruction set was first published at the Intel Developer Forum (IDF,Intel Developer Forum）。
In addition, x86processorManufacturerAMDAlso in the company's latestK10ArchitecturallyPhenomAdd 4 new SSE4A instruction sets to the processor.Note that SSE4 and SSE4A are not compatible with each other.
64 bit architecture
By 2002, due to the length of 32-bit features, the x86 architecture began to reach certain design limits.This makes it difficult to process a large amount of information stored more than 4GB, such as in the database or movie editing.
Intel had originally decided to completely abandon x86 compatibility in the 64 bit era and introduce a new architecture calledIA-64Technology as hisItaniumprocessorThe foundation of the product line.IA-64 is inherently incompatible with x86 software;It uses various simulation forms to run x86 software. However, running in simulation mode is very inefficient and will affect the running of other programs.
AMDActively convert 32-bit x86 (orIA-32）It is expanded to 64 bits.It is calledAMD64The schema for appears (also known asx86-64）, and the first product based on this technology isSingle coreOfOpteronandAthlon 64Processor family.Due to AMD's64 bit processorThe product line first entered the market, and Microsoft was unwilling to develop two different 64 bit operating systems for Intel and AMD. Intel was also forced to adopt the AMD64 instruction set and add some new extensions to their own products, namedEM64TArchitecture (obviously they don't want to admit that these instruction sets are from its main rivals), EM64T was later officially renamed by Intel asIntel 64。
This is the first major x86 architecture upgrade initiated and designed by a non Intel manufacturer.Perhaps more importantly, it is also the first time that Intel has actually accepted this essential technology from an external source.
fictitious
Virtual x86 is difficult because its architecture does not meetPopek and Goldberg virtualization requirements 。However, there are several commercial virtual x86 products, such asVMwareandMicrosoftOfVirtual PC。Both Intel and AMD have publicly announced the future x86processorThere will be new enhancements to make it easier to achieve more efficient virtualization.Intel codes for this virtual feature are called "Vanderpool" and "Silvervale";AMD uses the code name "Pacifica".
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Multiple companies design, produce and sell x86processorAnd its compatible products, including:
