{“状态”:“确定”,“消息类型”:“工作”,“信息版本”:“1.0.0”,“邮件”:{“索引”:{“日期-部件”:[[2024,4,27]],“日期-时间”:“2024-04-27T05:53:14Z”,“时间戳”:1714197194202},“参考-计数”:27,“出版商”:“Springer Science and Business Media LLC”:“2019-12-01T00:00:00Z”,“timestamp”:157515840000},“content-version”:“tdm”,“delay-in-days”:0,“URL”:“http://\\www.springer.com/tdm”},{“start”:{“date-parts”:[[2019,12,1]],“date-time”:“2019-12-01T00:00:00Z”,“timetamp”:1515158400000},m“}”,“出资人”:[{“DOI”:“10.13039\/100000001”,“名称”:“国家科学基金会”,“doi-asserted-by”:“publisher”,“award”:[“CCF-1814928”]}],“content-domain”:{“domain”:[“link.springer.com”],“crossmark-restriction”:false},“short-container-title”:[”J Electron Test“],“published-print”:{“date-parts”:[[2019,12]},”doi“10.1007”:“s10836-019-05845-5”,“type”:”journal-article“,“created”:{“日期部分”:[[2019,12,30]],“date-time”:“2019-12-30T09:02:33Z”,“timestamp”:1577696553000},“page”:“887-900”,“update-policy”:”http://\/dx.doi.org\/10.1007\/springer_crossmark_policy“,”source“:”Crossref“,“is-referenced-by-count”:2,“title”:[“为测试仪设计重新调整FPGA的用途以增强3D堆栈中的现场测试”],“前缀”:“10.1007”,“卷“:”35“,”作者“:[{“given”:“Yi”,“family”:“Sun”,“sequence”:“first”,“affiliation”:[]}“Jennifer”,“family”:“Dworak”,“sequence”:“additional”,“affiliation”:[]},{“given”:“Theodore”,“family”:“Manikas”,“sequence”:“additive”,“abfiliation“:[]{”given“:”R.Iris“,”family“:”Bahar“,”sequence“:”additional“,”affiliation:[]}],“member”:“297”,“published-online”:{“date-parts”:[[2019,12,30]]}、“reference”:[{“key”:”5845_CR1“,“doi-aser”ted-by“:”publisher“,”unstructured“:“Agrawal M,Chakrabarty K(2013)三维堆叠集成电路的测试成本优化和测试流选择。摘自:IEEE第31届超大规模集成电路测试研讨会(VTS),第1\u20136页。https:\/\/doi.org\/10.109\/VTS.2013.6548941“,”doi“:”10.1109\/VTS/2013.6548741“},{“key”:“5845_CR2”,“doi-asserted-by”:“publisher”,“unstructured”:“Aleksejev I,Devadze S,Jutman A,Shibin K(2015)fpgas上的虚拟可重构扫描链,用于优化电路板测试。In:Proc 16th Latin-american test Symposium(LATS),pp 1\u20136。https:\/\/doi.org\/10.109\/LATW.2015.7102411“,”doi“:”10.1109\/LATW/2015.7102411“},{“key”:“5845_CR3”,“unstructured”:“Alfke P(1996)高效移位寄存器、LFSR计数器和长伪随机序列生成器。Tech.rep.,Xilinx.https:\//www.Xilinx.com\/supportation\/documentation\/application_notes\/xapp052.pdf\/”},}“key”:“58 45_CR4”,“doi-asserted-by“:“publisher”,“unstructured”:“Chakravadhanula K,Chickermane V,Cunningham P,Foutz B,Meehl D,Milano L,Papameletis C,Scott D,Wilcox S(2017)《将试验压缩推进到物理维度》。摘自:IEEE国际测试大会(ITC),第1\u201310页。https:\/\/doi.org\/10.109\/TEST.2017.8242035“,”doi“:”10.1109\/TESS.2017.8242045“},{“key”:“5845_CR5”,“doi-asserted-by”:“publisher”,“unstructured”:“Chandra A,Kapur R(2008)低捕获功率扫描测试的有界相邻填充。摘自:第26届IEEE VLSI测试研讨会(VTS),第131\u2013138页。https:\/\/doi.org\/10.109\/VTS.2008.47“,”doi“:”10.1109\/VTS/2008.47”},{“key”:“5845_CR6”,“doi-asserted-by”:“publisher”,“unstructured”:“Chaware R,Nagarajan K,Ramalingam S(2012)在大型高密度65nm无源插入器上三维集成28nm FPGA芯片的装配和可靠性挑战。摘自:IEEE第62届电子元件和技术会议,第279\u2013283页。https:\/\/doi.org\/10.109\/ECTC.2012.6248841“,”doi“:”10.1109\/ECTC.2012.6248.841“},{“key”:“5845_CR7”,“first page”:”55“,“volume-title”:“计算机科学讲义”,“author”:“Christopher Claus”,“year”:“2010”,“unstructured”:“Claus C,Ahmed R,Altenried F,Stechele W(2010)在基于视频的驾驶员辅助系统中实现快速动态部分重新配置。收录:Sirisuk P、Morgan F、El-Ghazawi T、Amano H(编辑)《可重构计算:架构、工具和应用》。施普林格,柏林,第55页\u201367“},{“问题”:“5”,“密钥”:“5845_CR8”,“doi断言者”:“出版商”,“首页”:“6”,“doi”:“10.1109\/MDAT.2013.2278531”,“卷”:“30”,“作者”:“AL Crouch”,“年份”:“2013”,“非结构化”:“Crouch AL,Potter JC,Khoche A,Dworak J(2013)基于Fpga的嵌入式测试仪,带有p1687命令、控制和观察系统。IEEE Des测试30(5):6\u201314。https:\/\/doi.org\/10.109\/MDAT.2013.2278531“,”journal-title“:”IEEE Des Test“},{”key“:”5845_CR9“,”doi-asserted-by“:”publisher“,”unstructured“:”Debany WH,Gorniak MJ,Daskiewich DE,Macera AR,Kwiat KA,Dussault HB(1992)LFSR混叠导致的故障覆盖率损失的经验界。摘自:Proc IEEE VLSI Test Symposium,pp 143\u2013148。https:\/\/doi.org\/10.109\/VTEST.1992.232739“,“doi”:“10.1109\/VTETS.1992.232799”},{“key”:“5845_CR10”,“doi-asserted-by”:“publisher”,“unstructured”:“Deutsch S,Keller B,Chickermane V,Mukherjee S,Sood N,Goel SK,Chen J,Mehta A,Lee F,Marinissen EJ(2012)JEDEC宽I/O内存逻辑芯片堆栈互连测试的Dft架构和ATPG。摘自:IEEE国际测试大会(ITC),第1\u201310页。https:\/\/doi.org\/10.109\/TEST.2012.6401569“,”doi“:”10.1109\/TESE.2012.640156/9“},{“key”:“5845_CR11”,“doi-asserted-by”:“publisher”,“unstructured”:“Devadze S,Jutman A,Aleksejev I,Ubar R(2009)通过JTAG和FPGA快速扩展测试访问。In:Proc International TEST Conference,pp 1\u20137。https:\/\/doi.org\/10.109\/TEST.2009.5355668“,”doi“:”10.1109\/TESS.2009.5356668“},{“key”:“5845_CR12”,“unstructured”:“Dorsey P(2010)白皮书:Xilinx叠层硅互连技术提供突破性的fpga容量、带宽和能效。Tech.rep.,Xilinx“}”,{”key“:”5845_CR13“,”doi-asserted-by“:”publisher“,”unstructure“:”Fkih Y、Vivet P、Rouzeyre B、Flottes M、Di Natale G(2013)使用自动模具检测的基于JTAG的3D DfT架构。摘自:第九届微电子与电子学博士研究会议(PRIME),第341\u2013344页。https:\/\/doi.org/10.1109\/PRIME.2013.6603184“,”doi“:”10.1109\/PRIME.2013.6603184“},{”key“:”5845_CR14“,”doi断言“:”publisher“,”nonstructured“:”Lau JH,Yue TG(2009)3D IC与TSV集成的热管理(通过硅通孔)。In:Proc 59th Electronic Components and Technology Conference,pp 635\u2013640。https:\/\/doi.org\/10.109\/ECTC.2009.5074080“,”doi“:”10.1109\/ECTC.2009.50740.80“},{“key”:“5845_CR15”,“doi-asserted-by”:“publisher”,“unstructured”:“Loeblein M,Tsang SH,Han Y,Zhang X,Teo EHT(2016)以三维石墨烯和三维氮化硼网络为热界面材料的2.5D封装的散热增强(TIM)摘自:2016年IEEE第66届电子元件和技术会议(ECTC),第707\u2013713页。https:\/\/doi.org\/10.109\/ECTC.2016.85“,”doi“:”10.1109\/ECTC2016.85“},{”issue“:”6“,”key“:”5845_CR16“,“doi-asserted-by”:“publisher”,“first page”:“1432”,“doi”:“10.1109\/TCSI.2016.2647322”,“volume”:”64“,“author”:“PDS Manoj”,“year”:“2017”,“unstructured”:“Manoj PDS,Lin J,Zhu S、Yin Y、Liu X、Huang X、Song C、Zhang W、Yan M、Yu Z、Yu H(2017)具有2.5 d集成内存和加速器的可扩展网络芯片微处理器。IEEE Trans Circuits Syst I,注册论文64(6):1432\u20131443。https:\/\/doi.org\/10.109\/TCSI.2016.2647322“,“journal-title”:“IEEE Trans Circuits Syst I,Reg Papers”},{“key”:“5845_CR17”,“doi-asserted-by”:“publisher”,“unstructured”:“Mitra S,Kim KS(2002)X-compact:一种有效的响应压缩技术,用于降低测试成本。In:Proc International test Conference(ITC),pp 311\u2013320。https:\/\/doi.org/10.1109\/TEST.2002-1041774”,“doi”:“10.1109\/TEST.2002-1041774”},{“key”:“5845_CR18”,“doi断言者”:“publisher”,“非结构化”:“Rajski J,Tyszer J,Kassab M,Mukherjee N,Thompson R,Tsai K-h,Hertwig A,Tamarapalli N,Mrugalski G,Eide G,Qian J(2002)用于低成本制造测试的嵌入式确定性测试。摘自:Proc International Test Conference(ITC),第301\u2013310页。https:\/\/doi.org\/10.109\/TEST.2002.1041773“,”doi“:”10.1109\/TESS.2002.104177“},{”key“:”5845_CR19“,”doi-asserted-by“:”publisher“,”unstructured“:”Roy SK,Ghosh P,Rahaman H,Giri C(2014)基于会话的3D SOC核心测试调度。摘自:Proc IEEE Computer Society Annual Symposium on VLSI,pp 196\u2013201。https:\/\/doi.org\/10.109\/ISVLSI.2014.61“,”doi“:”10.1109\/ISVISI.2014.61},{“key”:“5845_CR20”,“unstructured”:“Sperling E 2.5D供应链准备好了吗?半导体工程https:\//semiengineering.com/Is-the-sacked-die-supply-chain-ready\/Accessed:2019-11-26“},”{“key”:”5845_CR2“,”doi-asserted-by“:”crossref“,”unstructure“:”芯片外的Sperling E思考。半导体工程https:\/\/semineering.com/thinking-outside-the-chip\/访问日期:2019-11-26“,”DOI“:”10.1201\/9780429025365-2“},{“问题”:“1”,“密钥”:“5845_CR22”,“DOI-sserted-by”:“publisher”,“首页”:“139”,”DOI:“10.1109\/TSCI.2014.2354752”,“卷”:“62”,“作者”:“C Wang”,“年份”:“2015”,“非结构化”:“Wang C,Zhou J,Weerasekera R,Zhao B,Liu X,Royannez P,Je M(2015)三维堆叠系统中键前tsv测试的Bist方法、架构和电路。IEEE Trans Circuits Syst I,注册论文62(1):139\u2013148。https:\/\/doi.org\/10.109\/TCSI.2014.2354752“,“journal-title”:“IEEE Trans Circuits Syst I,Reg Papers”},{“issue”:“2”,“key”:“5845_CR23”,“doi-asserted-by”:“publisher”,“first page”::“9:1”,“doi”:“10.1145\/1543438.1543442”,“volumes”:“5”,“author”:“X Wu”,“year”:“2009”,“unstructured”:“Wu X,Falkenstern P,Chakrabarty K、Xie Y(2009)三维集成电路的扫描设计和优化。《新兴技术计算系统杂志》5(2):9:1\u20139:26。https:\/\/doi.org\/10.1145\/1543438.1543442“,”journal-title“:”J Emerg Technol Compute Syst“},{”issue“:”3“,”key“:”5845_CR24“,”first page“:“16”,“volume”:“17”,“author”:“J Xie”,“year”:“2013”,“unstructured”:“Xie J,Patterson D(2013)通过面对面的堆叠实现3D IC集成。芯片规模评论17(3):16\u201319”,“journal-title”:“”芯片规模评论“},{“key”:“5845_CR25”,“unstructured”:“Xilinx:3D IC。https:\/\/www.Xilinx.com/products\/silicon-devices\/3dic.html。访问时间:2019-07-27”},}“key”:“58 45_CR26”,“非结构化”:“Xilinx:UG 474:7系列FPGA可配置逻辑块用户指南。https:\/\/www.xilinx.com/support\/documentation\/user_guides\/ug474_7Series_CLB.pdf。访问时间:2019-06-17“},{“key”:“5845_CR27”,“doi-asserted-by”:“publisher”,“unstructured”:“Zhang F,Sun Y,Shen X,Nepal K,Dworak J,Manikas T,Gui P,Bahar RI,Crouch A,Potter J(2016)使用3D芯片堆栈中现有的可重构逻辑进行测试。in:Proc IEEE 25th North Atlantic test Workshop(NATW),pp 46\u201352。https:\/\/doi.org\/10.109\/NATW.2016.15“,”doi“:”10.1109\/NATW/2016.15“}],”container-title“:[”电子测试杂志“],”original-title”:[],”language“:”en“,”link“:[{”URL“:”http://\/link.springer.com\/content\/pdf\/10007\/s10836-019-05845-5.pdf“,”content-type“:”application\/pdf“,”content-version“:”vor“,”意向应用“:”文本提示“},{“URL”:“http://\/link.springer.com/article\/10.1007\/s10836-019-05845-5\/fulltext.html”,“内容类型”:“text\/html”,“content-version”:“vor”,“intended-application”:“text-mining”},{”URL“:”http://\/lindex.springer\com/content\/pdf\/10.10007\/s108365-019-0585-5.pdf“,”内容类型“:”application\/pdf“content-version”:“”vor“,”意向应用“:“相似性检查”}],“存放”:{“日期-部分”:[[2020,12,29]],“日期-时间”:“2020-12-29T00:12:29Z”,“时间戳”:1609200749000},“分数”:1,“资源”:{“主要”:{“URL”:“http://link.springer.com\/10.10007\/s10836-019-05845-5”}},”副标题:[],“短标题”:[]2]]},“references-count”:27,“journal-issue”:{“issue”:“6”,“已发布的印刷品”:{“日期部分”:[[2019,12]}},“替代id”:[“5845”],“URL”:“http:\/\/dx.doi.org/10.1007\/s10836-019-05845-5”,“关系”:{},“ISSN”:[“0923-8174”,“1573-0727”],“ISSN type”:[{“value”:“0923-8174”,“type”:“print”},{“value”:“1573-0727”,“type”:“electronic”}],“subject”:[],“已发布”:{“日期部分”:[[2019,12]]},“断言”:[{“值”:“2019年9月13日”,“订单”:1,“名称”:“已接收”,“标签”:“收到”,“组”:{“名称”:“物品历史”,“标号”:“物品历史“}},{“值”:“2018年12月3日”,”订单“:2,”名称“:”接受“,”标签“:”接收“,”组“:{”名称“:”物品历史“,”标号“:”物品历史“首次在线”,“group”:{“name”:“ArticleHistory”,“label”:“文章历史”}}]}}